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Zhyl
22 days ago
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Qualcomm acquires RISC-V focused Ventana Micro Sys...
This. SiFive, for example, is a proprietory core design based on the open source RISC V spec. Hazard3 [0] on the other hand, is an open source core design.
[0]
https://github.com/Wren6991/Hazard3
jrepinc
22 days ago
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Another opensource core design is XiangShan
https://xiangshan.cc/en/
disdi
21 days ago
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Another opensource is
https://github.com/SpinalHDL/VexRiscv
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[0] https://github.com/Wren6991/Hazard3