Hacker News
new
|
past
|
comments
|
ask
|
show
|
jobs
|
submit
login
kbolino
6 days ago
|
parent
|
context
|
favorite
| on:
Why xor eax, eax?
Also, rather importantly, the L1
i
(instruction) cache is still only 32 kB. The part that got bigger, the 48 kB of L1
d
(data) cache, does not count for this purpose.
Guidelines
|
FAQ
|
Lists
|
API
|
Security
|
Legal
|
Apply to YC
|
Contact
Search:
